On-Chip Hebbian Learning via Integrated Neuromorphic Circuits
발표자
이정화 (연세대학교)
연구책임자
조정호 (연세대학교)
초록
내용
To address the von Neumann bottleneck and the demand for energy-efficient learning, we propose an integrated neuromorphic platform that implements Hebbian learning directly on hardware. The system incorporates three synergistic elements: presynaptic transistors for input modulation, threshold-switching memristor-based neurons for spiking output, and feedback synaptic transistors for adaptive weight update. Without relying on complex external circuitry, our architecture enables real-time weight modulation based on input–output correlation. A 6×6 array-level integration confirms reliable signal propagation, local learning, and reduced power consumption. This work demonstrates a practical route toward scalable, CMOS-free neuromorphic computing with embedded learning capabilities.