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[MR Special Session] Research Trends for the Commercialization of Conjugated Polymer-Based Optoelect

  • Sep 29(Mon), 2025, 13:00 - 17:00
  • 12회장 (203호)
  • Chair : 손성윤,이준우,최종민,김진석
15:50 - 16:15
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[L12-7]

Development of High-performance p-type Semiconductors for Transistors

발표자노용영 (포항공과대학교)

연구책임자노용영 (포항공과대학교)

공동저자노용영 (포항공과대학교)

Abstract

Developing high-mobility p-type semiconductors that can be grown using silicon-compatible processes at low temperatures, has remained challenging in the electronics community to integrate complementary electronics with the well-developed n-type counterparts.
This presentation will discuss our recent progress in developing high-performance p-type semiconductors as channel materials for thin film transistors. For the first part of my talk, I present an amorphous p-type oxide semiconductor composed of selenium-alloyed tellurium in a tellurium sub-oxide matrix, demonstrating its utility in high-performance, stable p-channel TFTs, and complementary circuits.1 Theoretical analysis unveils a delocalized valence band from tellurium 5p bands with shallow acceptor states, enabling excess hole doping and transport. Selenium alloying suppresses hole concentrations and facilitates the p orbital connectivity, realizing high-performance p-channel TFTs with an average field-effect hole mobility of ~15 cm2 V-1 s-1 and on/off current ratios of 106~107, along with wafer-scale uniformity and long-term stabilities under bias stress and ambient aging.
Next, I will present high-performance tin (Sn2+) halide perovskite based p-type transistors using cesium-tin-triiodide-based semiconducting layers.2,3 The optimized devices exhibit high field-effect hole mobilities of over 50 cm2 V−1 s−1, large current modulation greater than 108, and high operational stability and reproducibility.4 In addition, we explore triple A-cations of caesium-formamidinium-phenethylammonium to create high-quality cascaded Sn perovskite channel films. As such, the optimized TFTs show record hole mobilities of over 70 cm2 V−1 s−1 and on/off current ratios of over 108, comparable to the commercial low-temperature polysilicon technique level. In the final part, I would like to briefly introduce our recent halide perovskite transistors, fabricated by thermal evaporation.5
References: [1] A. Liu, Y.-Y. Noh et al, Nature, 629, 798–802 (2024). [2] A. Liu, Y.-Y. Noh et al, Nature Electronics 5, 78-83 (2022). [3] H. Zhu, Y.-Y. Noh et al, Nature Electronics 6, 650-657 (2023). [4] A. Liu, Y.-Y. Noh et al, Nature Electronics 6, 559-571 (2023). [5] Y, Reo, Y.-Y. Noh et al, Nature Electronics, 8, 403-410 (2025).

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